Prevue Guide Forums

tin wrote:Excellent, I'll probably get time to have a good look at them maybe wednesday

Any luck?

AriX wrote:

tin wrote:Excellent, I'll probably get time to have a good look at them maybe wednesday

Any luck?

LOL! I forgot I'll take a look

I don't know _ANYTHING_ about circuits, but it looks like the National Semiconductor LM393 chip is basically hooked up to the DTR (operating under the assumption that ground should be switched with DTR for some reason). I don't know what that means, or what a Low Offset Voltage Dual Comparator is.

Hmm I meant to respond to this quite a while ago didn't I? I reverse engineered the demodulator board almost completely. I'll dig out the notes and see what I can produce.

tin wrote:Hmm I meant to respond to this quite a while ago didn't I? I reverse engineered the demodulator board almost completely. I'll dig out the notes and see what I can produce.

Oooh, yay. I wanna hear.

tin wrote:Hmm I meant to respond to this quite a while ago didn't I? I reverse engineered the demodulator board almost completely. I'll dig out the notes and see what I can produce.

Find anything interesting?

Nothing we didn't already know, but I spent last night documenting it because it might be worth saying it all again, and then my printer decided not to work. So I didn't upload... I will try it again now....

Here are my wondrous notes you should be able to click for big version

Some more notes as a separate post because of the size of the image...

The board comprises two very much separate parts, split on my picture by a big line approx 2/3 towards the front of the board (as if viewed in situ inside Amiga). There's an RF/demodulator part for the incoming Audio signals for the EPG and CTRL data, and a Serial to signalling part to handle INCOMING serial data from the Amiga, to signal the Audio board, and operate the Cart Switch for the cable operators local video inserts.

RF/demodulator
The baseband RF is immediately split to two separate, identical tuners. Evidently one is set to the EPG data frequency, and one to the CTRL data frequency. These tuners have what appear to me to be 3 separate stages, but I am definitely very much a complete newbie amateur to both electronics and RF so that could be very wrong. There appear to be 2 intermediate stages, then a MC3359P-based IF tuner with some supporting components. Essentially all the components in the two boxes on the diagram tune the appropriate frequency and end up with what I presume is a standard audio signal from each.

I would say that possibly, you could feed audio of data modulated at the correct rate into the boards here, maybe for example from a modem, to simulate the data arriving at this point.

These two audio signals go to a LM393N Comparator, that, again with little knowledge of such things, appears to me to turn an output pin on or off based on the level of voltage coming in. Therefore as the two audio inputs warble high and low (much like an 8-bit computer tape for example) the output switches on and off.

These two sections essentially take RF-borne audio feeds and turn them into raw serial data. There is nothing in the way of checking/buffering/synchronising here, it just reshapes the audio into serial data. As we know from before these two serial data feeds are then sent on pin 3 and pin 5 of the serial port on the card - which also means that pin 7 and pin 5 ARE reversed from a standard DB9 serial port.

Serial to signalling
This part of the board is a bit more obvious. The signal incoming from pin 2 of the serial port is sent to a MC74F00N which looks to me to be a very wasteful way to implement an inverter (so high is changed to low and vice-versa).

This is then fed to a CM8017 which I guess is a pretty standard UART serial part. this reads the serial data and buffers it to a set of 8 pins, R01 to R08.

CM8017 has a supporting clock which is generated by a MC14060BCP. How that works and how it's implemented on this card is a bit beyond me, suffice to say the CM8017 says it needs a clock 14x faster than the intended bit rate, so I guess the MC14060BCP provides a clock that is 14 times 2400 baud.

R01 to R03 from the UART are then fed to a MC14028BCP which is operating as a Binary to octal converter. Essentially we use 3 of it's output pins that represent 1,2 and 3. When the binary for 1,2 or 3 comes in on the inputs one (and only one) of these pins is set on. All 3 of the pins are routed over the ISA bus to the Audio card via ISA bus pins DMA2 (6) NOWS (8) and DACK3 (15). Note on the audio card they are labelled 6,8 and 15, and are routed to the middle section of the audio card. NB as we discussed before the ISA bus is not live in the Amiga (apart from voltage). The cards are therefore free to use the bus however they see fit.

Finally R06 of the UART is connected via a couple of amplifying transistors to the relay. This presumably closes the cart switch when bit 6 of the serial data is set.

Therefore the Amiga->card serial states that make any sense are:-

0x00 no audio, no cart
0x01 audio 1, no cart
0x02 audio 2, no cart
0x03 audio 3, no cart

0x20 no audio, cart switch on
0x21 audio 1, cart switch on
0x22 audio 2, cart switch on
0x23 audio 3, cart switch on

whether audio at the same time as a cart switch is a valid state I guess is only under control of the PG software. Also which audio is which I can't be sure.

I noted also that there is something connected via pins RESET (2) and IRQ2 (4) of the ISA bus which are connected to the scan control pins on each tuner. What this is for I don't know, the pins are also not connected on the Audio board.


BTW AriX, if you are able to get a couple of shots at angles/resolutions that I could read the markings on the transistors, capacitors etc, I will have a go at doing a circuit diagram.

Sorry to bump an old thread - but I wanted to share a number of old photos of AP2000s that swest77 shared with me many years ago. Unsure if these have been posted here, or not: http://prevueguide.com/Hardware/Amiga/a2000-pg/